ECE 270: Digital Systems Design, Teaching Assistant

Undergraduate course, Purdue University, ECE Department, 2019

Students in this course use verilog (HDL) to design and test digital circuits on programmable logic devices. My role was to conduct one lab session per week, give demonstrations of key concepts, answer questions during lab/office hours, and grade weekly homeworks and lab assignments of students.

Topics: Boolean algebra, theory of logic functions, mapping techniques and function minimization, logic equivalent circuits and symbol transformations, CMOS logic gate implementations, gate electrical and timing characteristics, critical path assessment and propagation delay measurement, analysis and synthesis of combinational circuits, programmable logic devices, hardware description languages, signed number notations and arithmetic, binary arithmetic logic circuits, theory of sequential circuits, state transition and timing diagrams, analysis and synthesis of sequential circuits, Mealy and Moore models of sequential circuits, register design, clock generation circuits, metastability and reliability considerations, and design of a simple computer.